一种使用在基于单元库布局布线流程的芯片上变异(OCV)监控器方法学

An On-Chip Variation Monitor Methodology Using Cell-Based P&R Flow

工艺参数的变异导致半导体制造过程的偏差。这种变异无法避免而且在深亚微米领域,受限于光刻分辨率;氧化层腐蚀造成厚度的改变,因化学机械抛光铜金属线使铜金属层所造成的不平坦碟型缺陷等种种因素变得更加严重。除了工艺上的变异之外,电源电压以及操作温度也可能造成芯片上变异。这些芯片上变异通常建模为预估电路性能的某个百分比。环形振荡器在芯片上变异监控器中,被最广泛地作为性能指标。在过去,一般要花一到两周利用全手工定制对每个不同的工艺节点来实现工艺监控器的布局。然后,我们也必须手工将监控器单元放入芯片。这样做总是增加芯片实现上的开发周期。在本文将会提出一种实用的方法学来集成芯片上变异监控器,包括如何在一般基于单元库布局布线流程里来实现变异监控器,以及一种在逻辑阶段或物理实现阶段基于单元库灵活的整合流程来减低实现时所花费的精力。

The process variation accounts for deviations in the semiconductor fabrication process. This variation becomes unavoidable and serious in the deep submicron era due thickness, dishing and erosion effect on copper metal layer, to limited lithographic resolution, a variety of oxide so on. In addition to process variation, supply power operating temperature are also possible on-chip variances. Usually these on-chip variations are modeled as a percentage variation in the circuit performance estimation.The ring-oscillator is the most widely used as performance meter in the on-chip variation monitor. would take 1 or 2 weeks to implement process monitor layout by fully-customer layout service for process technology. After that, we also have to place the monitor cells into chip manually. It implementation turn around time In the past, it each different increases the In this paper, a practical integrated on-chip variation monitor methodology is proposed, including variation monitor implementation in cell-based P＆R flow, and a flexible cell-based integration flow in logic level and physical level to reduce the implementation effort.