摘要
根据CPU芯片应用验证的方法,给出写通模式下SM8260 Cache应用验证的流程及其硬件平台设计。分析L1 Cache,L2 Cache的初始化过程,对写通模式下的SM8260 L1 Cache,L2 Cache进行基准测试和大数组操作测试。测试结果表明,在大数组情况下,使用L2 Cache在一定程度上可提高嵌入式通信系统的性能。
According to the method of CPU chip application validation,this paper presents the test process and design of hardware platform used for SM8260 Cache application validation in write-through mode.It analyzes the initial process of SM8260 L1 Cache and L2 Cache,carries out benchmark tests and large array tests on write-through mode.Test results indicate that the use of L2 Cache can improve system performance in embedded system to some extent in the case of large array.
出处
《计算机工程》
CAS
CSCD
北大核心
2010年第13期211-212,215,共3页
Computer Engineering
关键词
一级缓存
二级缓存
应用验证
性能测试
L1 Cache
L2 Cache
application validation
performance measurement
