基于FPGA的芯片功能性验证自动化实现

Automatic Test for Chip Validation Based on FPGA

针对传统半导体设计流程中对MCU芯片进行功能性验证时涉及到多个芯片之间的互联,手工操作连接十分烦琐且易出现错误,介绍了一种基于FPGA的MCU引脚自动互联的设计与实现。介绍了MCU模块功能性验证自动化实现的概念,从硬件逻辑角度给出了一种解决方法,并且从FPGA模块设计、功能仿真和系统实现等方面,证明了新的测试方法不但降低了人为操作错误的可能性,而且提高了模块功能验证的覆盖率和验证效率,大大缩短了产品的上市时间。

In traditional semiconductor design process,the manual operation for the multichip external pad connection MCU component validation methodology is trivially and fallibly.Automatic test for MCU component validation based on FPGA is specifically introduced.The theory of MCU component validation for automatic testing is described,and a solution from hardware logic point of view is given.From the design,functional simulation and system achievement of FPGA module,it reveals that the new component validation methodology can reduce manual operating errors,improve the coverage of validation,enhance the work efficiency and shorten the time of products approaching market.