同频数字直放站回波干扰消除器的设计

Design of Echo Interference Canceller in Single Frequency Digital Repeater

针对无线同频直放站应用中急需解决的发送天线到接收天线之间的回波干扰问题,提出一种基于叠加PN序列的回波消除方案,简要介绍了基于FPGA的回波消除器的硬件设计,以及对回波消除直放站系统回波消除度测量的测试方案,并详细论述测试原理。测试结果表明,该回波消除直放站满足实际产品化要求。

A scheme of echo cancellation with PN sequence is presented in order to cancel the inter-inference from transmitting antenna to receive antenna in wireless single frequency repeater application. The hardware design of echo canceller based on FPGA is briefly introduced. The measure scheme of echo cancellation performance of repeater system is presented, and the theory of measurement is investigated. The measurement results show that the echo canceller repeater meets the actual productive requirements.