低电压、高速、高稳定性集成运算放大器芯片设计

Design of a Low-Voltage,High-Speed and High Stability Integrated OP-AMP Chip

基于0.18μmCMOS标准工艺,设计了一种工作电压为1.8V、带宽达到910MHz的高速、宽带、高稳定性的集成运算放大器芯片。阐述了该放大器电路构成原理、弥勒补偿电容和调零电阻补偿的应用方法、集成三支路基准电流源与低压共源共栅偏置电流分配电路的设计方法。利用CadenceSpectre仿真器对芯片版图进行了后端仿真验证测试。通过对测试结果的分析,表明了本设计能够有效提高系统的稳定性和速度,并具有优良电源抑制比和较大的输出摆幅。最后给出了芯片设计达到的结果。仿真测试结果表明,本设计芯片可应用于中频段需要对微弱信号处理的放大、模拟运算、有源滤波、AGC等电子系统。

Based on a 0.18 μm CMOS standard process,a high-speed,wideband and high stability integrated op-amp chip with 1.8 V voltage and 910 MHz bandwidth was designed. The constitution principle of the op-amp,the application methods of Miller compensation capacitor and ze-roing resistor compensation technique,and the design methods of integrated tri-branch current reference and the low voltage fold-cascode bias current distribution circuit were described. The post-simulation verification test of the chip layout by Cadence Spectre emulator indicates that the design can effectively improve the stability and speed of the system,which has excellent power supply rejection ratio as well as larger output swing. Finally,the design results of the chip were given. The simulation and test results show that the chip can be applied to the electronic systems,including amplification of the weak signal at middle frequency,analog calculation,active filter and AGC,etc.