基于符号率动态变频的低功耗DOCSIS上行发射器设计

An Dynamic Frequency Scaling Low Power Architecture Based on Symbol Rate for DOCSIS Upstream Transmitter

为解决DOCSIS上行发射器的高功耗问题,本文在深入剖析信道突发特点和发射器结构的基础上,提出了一种全新的发射器VLSI(超大规模集成电路)设计低功耗体系.通过引入发射符号率这一性能约束,该体系可使上行数据通路上所有运算电路能根据不同的突发符号率动态调节运算频率,以最小的功耗消耗匹配突发处理的性能要求.实验结果表明,在不同突发符号率下,所提出体系可使上行发射器的总功耗平均降低67.13%.本文设计的低功耗上行发射器已应用于符合EuroDOCSIS1.1规范的支持双向有线数字电视点播的Cable Modem(CM)SOC(片上系统)平台中,并表现出优良的低功耗特性.不失一般性,本文所提出的设计体系不仅适用于其他对功耗敏感的通信系统,同时,也将有助于推动超大规模集成电路及SOC设计领域中低功耗这一关键技术的发展.

In order to solve the high power consumption problem in the design of DOCSIS upstream transmitter,we proposed a new low power VLSI architecture for the design of upstream transmitter.By taking the symbol rate as the main performance constraint,the proposed architecture can scale the operating frequency of all circuit units included in the transmitter dynamically along with the changing of symbol rate on the upstream channel.In this way,the proposed architecture can achieve the optimized power consumption without losing any processing performance.Under different scenarios of symbol burst rates,the testing results show that the average power saving could be up to 67.13% after applying the proposed architecture.So far,the designed low power transmitter had been successfully integrated in a CM（Cable Modem） SOC（System On Chip） platform with self-owned intellectual property rights,which supports the two-way digital cable TOD（TV-on-Demand）,and demonstrated excellent low power characteristics.Without loss of generality,the design architecture presented in this paper also can be applied to the design of other power-sensitive communication system.At the same time,it is worth to be trust that the proposed method will help to promote the development of the key low-power technology in the VLSI and SOC design.