考虑温度分布效应的非对称RLC树时钟偏差研究

Study on clock skew of unsymmetrical RLC interconnect tree with temperature distribution

提出了一种RLC互连树零时钟偏差构建方法.给出了RLC互连温度非均匀分布及其延时的解析公式,并推导计算了最优的零时钟偏差点,所提模型同时考虑了互连温度非均匀分布、电感效应及不对称互连结构对零时钟偏差点的影响.针对65nm工艺节点对所提模型进行了仿真验证,结果显示,相较于同类模型,最大误差不超过1%.

Based on the influence of the nonuniform temperature distribution and the inductance effect of the wires on the interconnect delay time,a zero-clock-skew construction method of RLC interconnect clock tree is presented in this paper. The proposed analytical model has closed form expression and takes temperature distribution,inductance effect and unsymmetrical interconnect structure into consideration. Adopting parameters of 65 nm process technology,the proposed model is compared with the other available similar models. Results show that the new model is more accurate with maximum 1% error.