16位数字二阶Σ-Δ调制器的分析与设计

文章阐述了Σ-Δ调制器的基本工作原理,构建了二阶Σ-Δ调制器的基本结构,提出了一种用Verilog HDL语言描述二阶Σ-Δ调制器的实现方法,其中采用了简单的移位方法来描述调制器的四个增益系数,以实现乘法操作,进而减小了芯片的面积。在此基础上,运用MATLAB系统工具建立了二阶Σ-Δ调制器系统的模型,并完成了系统仿真验证。在电路级完成了它的Verilog语言描述,同时运用modelsim仿真工具对电路进行仿真验证,对数据进行FFT分析,最终证明了MATLAB系统模型和Verilog代码的一致性。

In this article, the principles of the ∑-△ modulater are shown below, and the basic structure of the second order ∑-△ modulater is analyzed, A realization method for second order ∑-△ modulater which is described by the Verilog HDL code is presented, the methed of replacement is adopted to describe four gains in order to carry out multiplicative operation ,then reducing using space of the chip. On this basis, the system model is established by using of MATLAB system Tool, and the simulation and validation of system are accomplished. circuit-level, the Verilog code of second order ∑-△ modulater is compiled. At the same time, the simulation and validation of the whole circuit are accomplished through the software of modelsim, datas are analyzed through FFT. At last, the coherence of the model of MATLAB system and Verilog HDL code are proved.