摘要
设计了应用于无线传感网络SoC解决方案的10位150 kS/s逐次逼近A/D转换器。通过失调消除技术、合理的时序控制和版图设计,实现了电路的高精度和低功耗。设计的A/D转换器积分非线性和微分非线性分别为0.54 LSB和0.8 LSB;在150 kS/s采样率1、4.3 kHz输入信号频率时,信噪比为60.8 dB,无杂散动态范围83.1 dB。设计实现基于TSMC 0.18μm混合信号CMOS工艺,IP核面积为0.083 mm2,1.8 V工作电压下功耗为0.56 mW。
A 10-bit 150 kS/s successive approximation A/D converter(ADC) was designed for wireless sensor network SoC.By using offset cancellation,optimized time-sequence control logic and proper layout design,high precision and low power were achieved for the circuit with 0.54 LSB of INL and 0.8 LSB of DNL.When operating at a sampling rate of 150 kS/s with 14.3 kHz input signal,the ADC had an SNR of 60.8 dB and an SFDR of 83.1 dB.Implemented in TSMC's 0.18 μm mixed signal CMOS technology,the IP core occupies a chip area of 0.083 mm^2 and the circuit consumes 0.56 mW of power from 1.8 V supply voltage.
出处
《微电子学》
CAS
CSCD
北大核心
2010年第4期491-496,共6页
Microelectronics
基金
浙江省重大科技专项(2006C11107)