摘要
传统的可重构电路主要由细粒度数据处理单元组成,但是其实现的运算功能单一,且布线复杂,限制了可重构SoC电路的通用性和灵活性。针对以上问题,根据通信领域基带信号处理的运算特点,设计了一种新型可重构阵列电路,可作为运算模块嵌入可重构SoC,此阵列由粗粒度数据处理单元构成的细胞互联组成。针对基带信号数据位宽多样的特点,细胞可重构实现多种算子。通过在阵列中每个细胞内部都嵌入独立配置存储器,采用并行数据配置电路的方式,以降低阵列的重构时间开销,实现整个阵列的快速重构。以伪码捕获为例,对设计的电路进行仿真。结果显示,设计的结构布线方法简单、通用性及灵活性强。
Conventional reconfigurable circuit consisted of fine-grained units has disadvantages such as few computing functions and complicated wiring,which limits its application to reconfigurable SOC.To solve these problems,a new reconfigurable array circuit was designed based on the operational features of communication base-band signal processing,which could be embedded into reconfigurable SOC as computing module.This array circuit was composed of cells consisting of coarse-grained units,which could be reconstructed to achieve a variety of operators based on various data widths of base-band data signal.In the array circuit,separate configuration memory was embedded into each cell,and data parallel configuration was used to reduce reconstruction time.Finally,with pseudo-code acquisition as an example,the proposed circuit was simulated to demonstrate the simplicity,universality and flexibility.
出处
《微电子学》
CAS
CSCD
北大核心
2010年第4期570-574,共5页
Microelectronics
基金
国家自然科学基金资助项目(60871009
60501022)
航空科学基金资助项目(2009ZD52045)
关键词
数字扩频通信
信号处理
可重构阵列电路
Digital spread spectrum communication
Signal processing
Reconfigurable array circuit