摘要
A full on-chip CMOS low-dropout（LDO） voltage regulator with high PSR is presented.Instead of relying on the zero generated by the load capacitor and its equivalent series resistance,the proposed LDO generates a zero by voltage-controlled current sources for stability.The compensating capacitor for the proposed scheme is only 0.18 pF,which is much smaller than the capacitor of the conventional compensation scheme.The full on-chip LDO was fabricated in commercial 0.35μm CMOS technology.The active chip area of the LDO（including the bandgap voltage reference） is 400×270μm^2.Experimental results show that the PSR of the LDO is-58.7 dB at a frequency of 10 Hz and-20 dB at a frequency of 1 MHz.The proposed LDO is capable of sourcing an output current up to 50 mA.
A full on-chip CMOS low-dropout（LDO） voltage regulator with high PSR is presented.Instead of relying on the zero generated by the load capacitor and its equivalent series resistance,the proposed LDO generates a zero by voltage-controlled current sources for stability.The compensating capacitor for the proposed scheme is only 0.18 pF,which is much smaller than the capacitor of the conventional compensation scheme.The full on-chip LDO was fabricated in commercial 0.35μm CMOS technology.The active chip area of the LDO（including the bandgap voltage reference） is 400×270μm^2.Experimental results show that the PSR of the LDO is-58.7 dB at a frequency of 10 Hz and-20 dB at a frequency of 1 MHz.The proposed LDO is capable of sourcing an output current up to 50 mA.
基金
Project supported by the National Science and Technology Major Project,China(No.2009ZX03007-002).
