基于FPGA的仿真系统数据采集控制器IP核设计

The IP core design of data acquisition and control subsystem for simulation system based on FPGA

介绍了在大型工业模拟仿真系统中,利用FPGA和软IP核实现数据采集及收发控制的方案,并对其进行设计实现。重点阐述了在发送指令和采集接收两种数据流模式下,该IP核的控制处理逻辑及工作状态机的设计及实现。同时,设计仿真测试对其进行验证。经测试验证,该IP核能实现对前端模拟仿真设备状态实时采集并控制的功能,达到了设计目的。

This article mainly introduced the design and implementation of an IP core based upon FPGA to realize a data acquisition and control subsystem could be used in large industrial simulation system. The description focused on representing the basic functional logic under sending and receiving data flow modules, in the mean time, utilizing working state machine to implement the program. Also tested the IP core and analyzed the real captured signal sequence. The result verified the IP core could fulfill the designing requirements.