一种低压低功耗Rail-to-Rail运算放大器的设计

Design of a low voltage low power Rail-to-Rail operational amplifier

基于TSMC 0.18μm互补型金属氧化物半导体(CMOS)工艺,设计了一种2 V低功耗恒定跨导Rail-to-Rail运算放大器。该运算放大器的输入级采用并行N沟道和P沟道差分输入级,实现了Rail-to-Rail的共模输入范围;为使输入跨导在整个共模输入范围内基本恒定,采用三倍电流镜技术;输出级采用带有Cascode米勒补偿的AB类输出控制电路。在Cadence Spectre环境下仿真后的结果显示:直流增益为91 dB,相位裕度为84.5°,单位增益带宽为9.4MHz,功耗为0.2 mW,适合应用在各种低压低功耗场合。

A 2 V low power Rail-to-Rail CMOS operational amplifier was designed with TSMC 0.18 μm CMOS process.The input stage which consisted of an NMOS and a PMOS differential pair reached Rail-to-Rail common mode input range.Meanwhile,the tail current of input stage adopted three-times current mirror technique to make the total gmmaintain as a constant in the common mode input range.The output stage employed a class-AB control circuit with cascade miller compensation.The cadence spectre simulation results indicate that the DC gain is 91 dB,the phase margin is 84.5° the bandwidth is 9.4 MHz and the power dissipation is 0.2 mW,which is very suitable for low voltage and low power application.