摘要
提出一种产生组合逻辑电路最小完全检测集的算法．通过此算法可以得到组合逻辑电路中任意可测故障的测试及最小完全检测集．
An algorithem for generating the least completely detecting set of combinational logicl circuit is brought forward.By using the algorithm,the detecting of detectable fault and the least completely detecting set are obtained in combinational logic circuit.
出处
《武汉交通科技大学学报》
1999年第3期282-285,共4页
Journal of Wuhan University of Technology(Transportation Science & Engineering)
关键词
D算法
最小完全检测集
组合逻辑电路
D algorithm
detection d cube
least complete detection set
