摘要
由于数字器件的运行时钟受限,基于数字处理芯片的时频测量的精度很难提高;利用FPGA内部锁相环的特点,设计了采用同频多相的多个时钟同时对输入信号进行测量,对各个时钟的测量值进行平均的高精度时频测量方法;介绍了采用产生多个同频多相时钟的方法,详细说明了采用多个同频多相的时钟同时进行时频测量的具体步骤;实际测量表明,该方法实现较为简单,能够在不提高时钟运行速率的情况下,成倍地提高信号的时频测量精度。
Because of the limited of running clock of digital process chip,the measurement precision of time and frequency based on digital process chip is hard to improve.Utilize the PLL of FPGA,design multi clocks in the same rate but in different phase,measure signal by these multi-phase clocks can improve the precision of time and frequency.Present the setting of the PLL of FPGA;give the detail of the measure steps.The practical measurements show that this method can greatly improve the measure precision in a simple way.
出处
《电子测试》
2010年第9期51-53,70,共4页
Electronic Test