层次式FPGA快速布局算法

Fast Placement Algorithm for Hierarchical FPGAs

随着现代FPGA规模与结构迅速发展,对FPGA物理设计的要求越来越高,为此,对商业化层次式FPGA提出一种快速布局算法.以基于划分的布局方法作为基本算法框架,针对层次式FPGA的结构制定计划分粒度控制、空间分配和线网权重分配等优化策略,对电路划分过程(整体布局过程)和详细布局过程进行优化.实验结果表明,该算法在实现快速布局的同时,嵌入的优化策略平均将总线长缩短29%;与基于结群的层次式FPGA布局算法相比,平均线长仅为基于结群算法的60%,同时平均运行速度快4倍多.

As the capacities of the FPGA devices continue to grow,and more complex architectures are embedded into modern FPGAs,it brings great challenges to FPGA physical design tools.In this paper,a fast placement algorithm is proposed to new commercial hierarchical FPGAs.The algorithm is based on partition framework,and embedded with some optimization strategies aiming at global placement process and detailed placement process on hierarchical FPGAs.Experimental results show that the embedded optimization strategies enable our algorithm a great improvement to the total wirelength of circuit,which achieves 29% on average.While compared with clustering-based algorithm,our algorithm speeds mount up to over 4 times in runtime with nearly 40% reduction on wirelength.