U波段小数分频锁相环型频率综合器

U-band Fractional-N PLL Frequency Synthesizer

使用0.18μm1.8VCMOS工艺实现了U波段小数分频锁相环型频率综合器,除压控振荡器(VCO)的调谐电感和锁相环路的无源滤波器外,其他模块都集成在片内。锁相环采用了带有开关电容阵列(SCA)的LC-VCO实现了宽频范围,使用3阶MASHΔ-Σ调制技术进行噪声整形降低了带内噪声。测试结果表明,频率综合器频率范围达到650～920MHz;波段内偏离中心频率100kHz处的相位噪声为-82dBc/Hz,1MHz处的相位噪声为-121dBc/Hz;最小频率分辨率为15Hz;在1.8V工作电压下,功耗为22mW。

A U-band fractional-N PLL frequency synthesizer is integrated in 0, 18 μm 1.8 V CMOS process, except for tuned inductor and loop filter. A LC tank voltage-controlled oscillator （VCO） with switched capacitors array （SCA） is used to achieve wide-band frequency range. The MASH A-N modulating technology is used to shape and degrade in-band phase noise. The measurements results show that the frequency range of frequency synthesizer is 650-920 MHz and the phase noise is -82 dBc/Hz@100 kHz and -121 dBc/Hz@1 MHz The frequency resolution can achieve 15 Hz; And the frequency synthesizer consumes 22 mW from a 1.8 V supply voltage.