基于Nios Ⅱ的边界扫描控制核的设计

Development of Boundary Scan Controller Based on Nios Ⅱ

本文基于ALTERA公司的Nios软核+可编程资源FPGA的SOPC平台设计了一个边界扫描控制器IP核。该控制器基于Altera的SOPC系统及Avalon总线规范,完成自定义用户逻辑的定制。详细阐述了边界扫描控制核的设计方案及设计流程,通过SOPC中的Avalon总线接口,该控制器产生符合IEEE1149.1标准的边界扫描测试系统,能实现各种边界扫描测试。提高了系统设计的灵活性,加速了边界扫描测试效率。仿真及实验结果表明,该设计能够完成有效高速的边界扫描测试。

This article based on ALTERA＇s Nios soft-core and programmable SOPC platform design e boundary-scan controller IP core.The Controller of the Altera SOPC system based on Avalon bus norms accomplishs user logic of custom.It expounds the boundary scan control core design plan and design process.Through Avalon bus interface of the SOPC,the controller produces boundary scan test system according with IEEE1149.1 standard,and can achieve various boundary scan test.To improve the flexibility of the system design.accelerate the boundary scan testing efficiency.Simulation and experimental results show that the design can complete the boundary scan test with effectively high-speed.