基于FPGA的循环冗余校验模块设计

A Design of Cyclic Redundancy Check Module Based on FPGA

提出了一种采用FPGA可编程芯片实现对不同长度数据的CRC并行算法的设计思想,并用VHDL语言在EPF10K10LC84-4芯片上完成了循环冗余校验模块的功能.实验结果表明该模块具有很好的通用性和灵活性.

An implemention of CRC parallel algorithm is proposed based on FPGA programmable chip which can process various lengths of data.On a piece of EPF10K10LC84-4 chip,the CRC module is accomplished using VHDL language.The results of experiment proves that the module has good flexibility and generality.