摘要
针对一款军用DSP在其性能测试分析中的局限性,提出并实现了以FPGA为核心的硬件设计方案,详细给出系统整体方案设计和具体的硬件选型及接口设计;介绍了以Cyclone EP1C6为主控制器在其外围进行了存储器,USB2.0电路的扩展,丰富了系统硬件接口资源;该数据采集分析系统具有高速性和实时性。
For limitations in performance testing and analysis of a kind of DSP in military,the hardware design based on FPGA is proposed and implemented.It introduces the hardware design and the hardware type selection and the interface design based on the FPGA chip cyclone EP1C6 in detail.With the extension of the memory and USB2.0 circuits,the system has abundant interface resources.The data sampling and analysis system has the characteristics of high-speed and real-time.
出处
《微计算机信息》
2010年第26期134-135,153,共3页
Control & Automation
基金
基金申请人:徐精华
项目名称:导引头多DSP通用开发系统的研制
基金颁发部门:江西省教育厅(GJJ08213)