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一种用于高速A/D转换器的大幅度Dither结构 被引量：1

A Large Range Dither Structure for High Speed A/D Converter
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摘要 Dither(抖动)算法可用于A/D转换器减小模数转换后的频谱谐波,提高其动态性能。目前,Dither算法在高速A/D转换器中的应用日益广泛。以传统的加减型大幅度Dither结构为基础,提出一种基于查找表的存储型宽带加减型结构和相应算法。该结构可降低传统结构的复杂度,并提高转换速度。 Dither algorithm,which can be used in high speed A/D converter to reduce harmonic and spur in the frequency spectrum and enhance its dynamic performance,has found more and more applications in high speed A/D converter.A new code searching wideband dither structure and corresponding algorithm were proposed based on traditional add-and-subtract dither structure,to reduce complexity of the conventional system and improving conversion rate.
作者 阎波 张占鹏 林水生
机构地区 电子科技大学通信与信息工程学院
出处 《微电子学》 CAS CSCD 北大核心 2010年第5期636-639,共4页 Microelectronics
基金 国家863目标导向项目(2009AA01Z259)资助
关键词 A/D转换器 宽带Dither 动态性能 A/D converter Wideband dither Dynamic performance
分类号 TN431.2 [电子电信—微电子学与固体电子学]
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参考文献9

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二级参考文献6

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共引文献2

同被引文献5

  • 1SIRAGURSA E, GALTON I. A digitally enhanced 1.8-V 15-bit 40-MSample/s CMOS pipelined ADC [J].IEEE J Sol Sta Circ, 2004, 39(12): 2126-2138.
  • 2KELLY D, YANG W, MEHR I, et al. A 3-V 340- mW 14-b 75-Msample/s CMOS ABC with 85-dB SFDR at Nyquist input [J]. IEEE J Sol Sta Circ, 2001, 36(12) : 1931-1936.
  • 3SHU Y-S, SONG B-S. A 15-bit linear 20-MS/s pipelined AIX2 digitally calibrated with signal- dependent dithering [J]. IEEE J Sol Sta Circ, 2008, 43(2) : 342-350.
  • 4ANNA D. A-D conversion with dither signal - possibilities and limitations [J]. Measur Sci Rev, 2001, 1(1): 75-78.
  • 5杨赞秀.适用于10-bit100MSPS流水线ADC的subAI)C的研究与设计[D].成都:电子科技大学,2006.

引证文献1

微电子学
2010年 第5期

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