摘要
A novel CMOS atto-ampere current mirror （AACM） is proposed which reaches the minimum yet reported current range of 0.4 aA. Operation of this circuit is based on the source voltage modulation instead of the conventionally used gate voltage modulation which interestingly prevents usage of commonly required voltage shifting in those circuits. The proposed circuit has a simple structure prohibiting large chip area consumption which consumes extremely low power of 1.5 μW. It is thus the best choice for ultra low power low voltage （ULPLV） applications. By using a very simple frequency compensation technique, its bandwidth is widened to 15.8 kHz. Simulation results in SMIC （Semiconductor Manufacturing International Corporation） 0.18 μm CMOS technology with Hspice are presented to demonstrate the validation of the proposed current mirror.
A novel CMOS atto-ampere current mirror （AACM） is proposed which reaches the minimum yet reported current range of 0.4 aA. Operation of this circuit is based on the source voltage modulation instead of the conventionally used gate voltage modulation which interestingly prevents usage of commonly required voltage shifting in those circuits. The proposed circuit has a simple structure prohibiting large chip area consumption which consumes extremely low power of 1.5 μW. It is thus the best choice for ultra low power low voltage （ULPLV） applications. By using a very simple frequency compensation technique, its bandwidth is widened to 15.8 kHz. Simulation results in SMIC （Semiconductor Manufacturing International Corporation） 0.18 μm CMOS technology with Hspice are presented to demonstrate the validation of the proposed current mirror.
