摘要
目的针对高速数字信号处理的要求,给出了用现场可编程门阵列(FPGA)实现的快速傅里叶变换(FFT)方案.方法算法为按时间抽取的基4算法,采用递归结构的块浮点运算方案,蝶算过程只扩展两个符号位以适应雷达信号处理的特点,乘法器由阵列乘法器实现.结果采用流水方式保证系统的速度,使取数据、计算旋转因子、复乘、DFT等操作协调一致,在计算、通信和存储间取得平衡,避免了瓶颈的出现.结论实验表明,用FP-GA实现高速数字信号处理的算法是一个可行的方案.
Aim To propose a scheme for implementing FFT with FPGA in accor dance with the requirement for high speed digital signal processing. Methods The structure of FPGA and requirement of system were considered in the experiment, radix 4 algorithm of DIT and recursive structure were adopted. The group float point arithmetic operation was used in the butterfly and the array multiplier was used to realize multiplication. Results The pipeline pattern was used to ensure the system speed, it made fetching data, calculating twiddle factor, complex multiplication and DFT operation coordinate. The balance of calculation, communication and storage was realized and the bottleneck was avoided. Conclusion It demonstrates that it is a feasible method to use FPGA to realize algorithm in the high speed DSP.
出处
《北京理工大学学报》
EI
CAS
CSCD
1999年第2期234-238,共5页
Transactions of Beijing Institute of Technology
关键词
可编程门阵列
数字信号处理
FPGA
FFT
discrete Fourier transform
fast Fourier transform
block float point arithmetic
programmable gate arrays