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CMOS伪差分E类射频功率放大器设计 被引量:3

Design of the Pseudo-differential Class-E RF Power Amplifier in CMOS Process
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摘要 分析了E类功放的非理想因素,其中着重分析寄生电感对系统性能的影响,采用伪差分E类功放结构有效地抑制寄生电感的影响。最后基于理想的设计方程和LoadPull技术,采用0.18μmCMOS工艺,设计出高效率的差分E类功率放大器。在电源电压1.8V,温度25℃,输入信号0dBm条件下,具有最大输出功率26.1dBm,PAE为60.2%。 The non-ideal factors of Class E power amplifiers are analyzed with emphasis on the Parasitic inductance effect,which is effectively suppressed by using the pseudo-differential Class E power amplifier structure.Based on the ideal design equations and load pull techniques.an efficient differential class E power amplifier is designed in 0.18 μm TSMC process.Simulation results using ADS(Advanced Design System) show that the power amplifier can deliver 26.1 dBm output power with 60.2 % power-added-efficiency respectively under a single supply voltage of 1.8 V and input power of 0 dBm.
出处 《电子科技》 2010年第10期49-52,共4页 Electronic Science and Technology
关键词 伪差分E类 射频功率放大器 Loadpull技术 寄生电感 CMOS differential class-E RF power amplifier load pull parasitic inductance CMOS bluetooth
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参考文献8

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二级参考文献16

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