摘要
为了在时延驱动的布局算法中减少关键路径的数量,提出一种预先指定单元位置的基于线性规划优化时延驱动的布局方法.在全局布局每次迭代优化后提取关键子电路,建立子电路的时延模型;应用线性规划优化并移动子电路上各单元位置形成新的初始布局,进行下一次布局迭代.将该方法嵌入到力指向的布局器Kraftwerk中的实验结果表明,最小负时延裕量提高了21 ps,负时延裕量总和平均提高了483 ps,同时线长仅增加了0.83%.
For the purpose of reducing the number of the critical paths in timing-driven placement,a powerful new technique to optimize timing via preassigning cell based on linear programming(LP) is represented.The new locations of the cells on the timing critical sub-circuits are optimized by LP and the cells are preassigned to the new locations before the next placement iteration.This method is embedded into the global force directed placement process of Kraftwerk,and the experimental results show that the average worst slack improves 21ps and average total negative slack reduces 483ps while the average wire length only increases 0.83%.
出处
《计算机辅助设计与图形学学报》
EI
CSCD
北大核心
2010年第10期1695-1700,共6页
Journal of Computer-Aided Design & Computer Graphics
基金
国家自然科学基金(60876026
60833004)
关键词
VLSI
时延
布局
线性规划
VLSI
timing
placement
linear programming