摘要
随着数字系统中时钟频率的提高,PCB上的信号完整性也日益成为设计过程中不可忽略的问题.文中通过阐述IBIS模型的建立和PCB板上信号完整性的分析,介绍了一种必要的基于IBIS模型建立的信号完整性仿真及分析方法,例举了时钟网络设计的反射仿真结果对比.
As the clock rate of digital system increases,the PCB signal integrity（SI）problem becomes unignorable.By taking advantage of IBIS model and analyzing the SI issues on PCB,a necessary SI analysis and simulation method based on the IBIS modeling is presented in this paper.Finally the reflection simulation results of the method on a clock net are introduced as an example.
出处
《微电子学与计算机》
CSCD
北大核心
2010年第10期111-113,共3页
Microelectronics & Computer
关键词
PCB
信号完整性
行为级模型
IBIS建模
PCB
Signal Integrity（SI）
behavior model
I/O Buffer Information Specification（IBIS）modeling
