摘要
为构建一个紧凑、灵活的CPCI系统,在IP核的基础上,采用FPGA来实现PCI总线接口电路。为克服PCI核突发传送过程中存在的问题,提出了一种基于双口RAM的带备份功能的同步FIFO和主设备突发传送模块的设计。在驱动开发的基础上,对该接口电路和PLX公司生产的PLX9056的PCI总线的实测性能进行了比较。比较结果表明,基于IP核的PCI接口电路总体性能优于PLX9056。
To construct a compact and flexible CPCI system,the PCI interface circuit is implemented by FPGA based on IP core. To Conquer problems exist in the PCI core burst transfer,a design of a synchronous FIFO with backup function based on dual-port RAM and master device burst transfer module is developed. Based on PCI driver development,the measured PCI bus performance is compared between the interface circuit described in this article and PLX9056 manufactured by PLX Corporation. The results showed that the overall performance of the interface circuit designed by FPGA with IP core is superior to PLX9056.
出处
《微计算机应用》
2010年第10期50-56,共7页
Microcomputer Applications
