摘要
本文采用了增加预处理的R-L模式大数模幂运算实现RSA算法,设计了RSA算法IP核的系统构架。通过对大数模乘Montgomery算法的分析,将算法语句采用相应的硬件运算器进行处理,在对串行语句的延迟以及运算部件的延迟的准确控制前提下,实现了Montgomery算法的硬件化、并行化,大大提高了模乘运算的运行效率。本文RSA算法IP核是在XILINX公司的FPGA中实现,对IP核的各个部分进行了硬件仿真,并对仿真结果进行了分析验证。
R-L model algorithm with preprocess was applied to implement RSA algorithm and design RSA IP core structure. By analyzing Montgomery algorithm, the software algorithm was replaced by corresponding hardware calculator. On the basis of accurate delay control of algorithm and calculator components, we fulfill the hardware-based and paralleled algorithm, which make it with high efficiency. The RSA IP core had been implemented in the FPGA of XILINX Corporation. Hardware-based emulation to the each part of the IP core had been conducted and result was analyzed.
出处
《江西电力》
2010年第4期21-23,50,共4页
Jiangxi Electric Power