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高速图像采集系统的研究及FPGA实现 被引量:14

High-speed image acquisition system and FPGA implementation
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摘要 针对图像采集速度慢和图像品质低等问题,设计并实现了一种基于NiosⅡ双核的高速图像采集系统。该系统利用现场可编程门阵列(FPGA)对图像传感器进行控制,并通过乒乓操作原理对图像进行采集。然后采用面积换速度的原则进行图像处理,在图像处理过程中采用BP网络图像压缩的算法保存并传输给上位机。对采集数据进行仿真表明:与传统图像采集方法相比较,该系统的图像采集速度和图像采集质量都得到了极大的提高。 To solve the problem of low speed and poor quality of image acquisition, a system of high-speed image acquisition based on NiosⅡ was introduced. First of all, Field-Programmable Gate Array (FPGA) was used for controlling image sensor, and the image was captured through ping-pang operation. Then, the principle of area exchange rate was used for image processing. After that, the data was kept and transmitted to the upper device by image compression algorithm of BP neural network. Through the simulation experiments from the acquired data, the simulation results demonstrate that this system provides image acquisition of higher speed and quality than traditional system.
出处 《计算机应用》 CSCD 北大核心 2010年第11期3094-3096,共3页 journal of Computer Applications
基金 陕西省科技厅工业攻关项目(2006K05-G17) 西安市科学技术局工业发展项目(YF07031)
关键词 面积换速度 乒乓操作 BP神经网络 现场可编程门阵列 area exchange rate ping-pang operating BP neural network Field-Programmable Gate Array (FPGA)
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