基于二维查找表的SET耦合注入方法

Coupled SET Pulse Injection Method Based on 2D Look-up Table

随着器件特征尺寸的减小,利用独立电流源进行单粒子瞬态(Single Event Transient,SET)注入的方法与实际脉冲存在很大误差,器件/电路混合模拟能与实际较好符合,但在大规模组合逻辑的软错误率分析中使用器件/电路混合模拟非常耗时,急需电路级快速的SET注入方法。针对0.18μm CMOS反相器构建了基于二维查找表的SET耦合注入方法,并与器件/电路混合模拟的结果进行比较。结果发现:基于二维查找表的SET耦合注入方法与器件/电路混合模拟方法的结果比较符合,而仿真速度比器件/电路混合模拟快3个数量级。

With technology feature sizes decreasing, dependent current source method is checked to induce great difference from practical SET pulses. Results consistent with experiments can be obtained by mixed-mode simulation. However, mixed-mode simulation is proved to be time-consuming in soft errors analysis of large scale combinational logic circuits. Accordingly, circuit-level fast SET pulse injection method is needed. This paper implemented coupled SET pulse injection method based on 2D look-up table for 0.18 μm CMOS inverter. It is proved that coupled SET pulse injection results comply with mixed-mode simulation results well. Moreover, coupled SET pulse injection is three orders faster than mixed-mode simulation.