摘要
采用高分辨率的数字相机作为输入源,能够明显地提高显示及处理效果。本系统采用FPGA和大容量缓存的硬件架构,通过FPGA的逻辑编程灵活调配系统的资源,将图像采集、预处理、显示合理分配到各个硬件单元,经过实验验证,各个单元都能够达到预期效果。
As an input source, high resolution digital camera is adopted to improve the results of display and process. The system uses a hardware framework including FPGA and mass buffer storage, with its resource flexibly assigned through the logic programming of FPGA. The image acquisition,pretreatment and displaying function are reasonably distributed to each hardware unito The effect of each function unit is anticipated through experiment testing.
出处
《电光系统》
2010年第3期8-10,13,共4页
Electronic and Electro-optical Systems