一种在RTL测试模式生成中验证断言再用的方法(英文)

An approach for verification assertions reuse 2 in RTL test pattern generation

在对设计的功能验证中,断言常被用于检测设计错误.针对制造业的测试模式生成,提出了在寄存器传输层(RTL)用于无扫描设计的断言再用方法.这种方法减少了顺序自动测试码生成程序(ATPG)的搜索空间,因而能加快测试生成过程,增加故障覆盖率.通过实例分析,证明了该方法的可行性和效果.

Assertions are used in functional verification of design to detect design errors.In this paper we propose an approach for their reuse in manufacturing test pattern generation at Register-Transfer Level （RTL） for non-scan designs.The approach provides search-space reduction for sequential ATPG therefore potentially speeding up the test generation process and increasing the fault coverage.A discussed case-study demonstrates the feasibility and effectiveness of the proposed idea.