基于ISS的多处理器嵌入式系统模拟方案

Scheme of Multi-processor Embedded System Simulation Based on ISS

提出一种基于ISS的多处理器嵌入式系统模拟方案。采用基于总线的互连方式,合理利用共享内存机制,解决不同处理器进程间的通信问题。提出全局时钟同步机制,实现对所有处理器单元的调度安排,使各处理器之间保持步调一致。分析表明,该方案能够实现对单个或多个同源或不同源目标代码的模拟与跟踪。

This paper provides a scheme of multi-processor embedded system simulation based on Instruction Set Simulator（ISS）. By adopting interconnection based on bus and mechanism of sharing global memory, it can efficiently solve file problem of communication between processors. The global clock synchronization is introduced to realize flexibly the schedule for all processing units, which keeps the processors in step. Analysis show that the simulator can simulate and track one or more homologous object code which can also come from different sources.