高速信号采集与分析系统硬件架构的研究

Research of hardware architecture for high-speed signal acquisition and analysis system

高速数据采集系统作为宽频带信号获取的手段在科学研究和工业生产中起着重要的作用。介绍了基于USB接口的高速信号采集与分析系统结构,以高速A/D ADS830E为对象给出了FIFO、双口SRAM和＂CPLD＋高速SRAM＂3种高速采样及缓存方案,包括结构与逻辑框图、工作原理,并分别指出各自的优缺点。最后,采用＂高速A/D＋CPLD＋高速SRAM＂硬件结构,并结合USB接口组建了虚拟仪器系统,加以验证。

High-speed data collection system as a means of wide-band signal information obtaining is playing important role in scientific research and industrial production.This paper describes the structure of high-speed signal collection and analysis system,and introduces the plan of making up high-speed sampling and caching system based on FIFO,dual-port SRAM and ＂CPLD ＋ fast SRAM＂,including the structure and logic diagram,working principle,and points out their advantages and disadvantages respectively.Finally,based on ＂CPLD ＋ fast SRAM＂ structure and USB interface to build virtual instrumentation systems,that should be verified.