低噪声低功耗微电容读出电路的优化与设计

Optimization and Design of Low-Noise Low-Power Microcapacitance Readout Circuit

结合斩波稳定技术,通过电容匹配和多级优化的方法分别对用于MEMS微传感器的微电容读出电路的噪声性能和功耗进行了优化。基于优化分析采用两级斩波稳定电路结构,在CSMC 0.5μm CMOS工艺下,用Cadence Spectre进行了仿真验证。结果表明能精确检测出aF(10-18F)量级的微电容,输出电压变化量与电容变化量呈线性关系,并且输出失调电压仅为38.9μV,等效输入噪声电压为17 nV/Hz1/2。在5 V电源电压下功耗仅为2.5 mW,输出延时为6.29μs。

Based on the chopper-stabilized technique,the capacitance matching and multi-stage optimization methods are employed to optimize the noise and power dissipation of the microcapacitance readout circuit for MEMS microsensor.According to the optimization analysis,the dual-chopper stabilized circuit is designed and successfully verified by Cadence Spectre in CSMC 0.5 μm CMOS process.Simulation results indicate that the resolution of microcapacitance detection is in the order of magnitude aF,and the capacitance variation shows a linear relation with the output voltage variation.The output voltage offset is only 38.9 μV and the equivalent input-referred noise is about 17 nV/Hz1/2.Under the 5 V supply,the power consumption is only 2.5 mW,and the output delay is 6.29 μs.