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双极晶体管在强电磁脉冲作用下的损伤效应与机理 被引量:23

The damage effect and mechanism of the bipolar transistor induced by the intense electromagnetic pulse
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摘要 针对典型n+-p-n-n+结构的双极晶体管,从器件内部电场强度、电流密度和温度分布变化的分析出发,研究了在强电磁脉冲(electromagnetic pulse,EMP)作用下其内在损伤过程与机理.研究表明,双极晶体管损伤部位在不同幅度的注入电压作用下是不同的,注入电压幅度较低时,发射区中心下方的集电区附近首先烧毁,而在高幅度注入电压作用下,由于基区-外延层-衬底构成的PIN结构发生击穿,导致靠近发射极一侧的基极边缘处首先发生烧毁.利用数据分析软件,对不同注入电压下的器件损伤功率P和脉宽T进行拟合得出了P与T之间的关系式,结果表明由于双极晶体管损伤能量的不确定性,强电磁脉冲损伤的经验公式P=AT-1(A为常数)对于双极晶体管应修正为P=AT-1.4. A study of the internal damage process and mechanism of the typical n + -p-n-n + structure bipolar transistor induced by the intense electromagnetic pulse (EMP) is carried out in this paper from the variation analysis of the distribution of the electric field,the current density and the temperature. Research shows that the damage position of the bipolar transistor is different with the different magnitude of the injecting voltage, when the magnitude of the injecting voltage is low the damage will appear firstly near the eolleetor region under the eenter of the emitter region,and when the magnitude of the injecting voltage is sufficiently high the damage will appear firstly at the edge of the base near the emitter due to the breakdown of the PIN structure composed of the base-epitaxial layer-collector. Adopting the data analysis software, the relation equation between the deviee damage power P and the pulse width T under different injecting voltage is obtained. Owing to the variety of the device damage energy, it is demonstrated that the empirical formulas of the intense electromagnetic pulse P = AT-1 (A is a constant) is modified to P = AT-1.4 for the bipolar transistor.
出处 《物理学报》 SCIE EI CAS CSCD 北大核心 2010年第11期8118-8124,共7页 Acta Physica Sinica
基金 国家自然科学基金(批准号:60776034)资助的课题~~
关键词 双极晶体管 强电磁脉冲 器件损伤 损伤功率 bipolar transistor, the intense electromagnetic pulse, device damage, damage power
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参考文献12

  • 1Wunsch D C, Bell R R 1968 IEEE Transactions on Nuclear Science 15 244.
  • 2Dobykin V D,Kharchenko V V 2006 Journal of Communications Technology and Electronics 51 231.
  • 3Dobykin V D 2008 Journal of Communications Technology and Electronics 53 100.
  • 4王源 贾嵩 孙磊 张钢刚 张兴 吉利久.物理学报,2007,56:7243-7243.
  • 5柴常春,杨银堂,张冰,冷鹏,杨杨,饶伟.硅基双极低噪声放大器的能量注入损伤与机理[J].Journal of Semiconductors,2008,29(12):2403-2407. 被引量:6
  • 6Chai C C, Yang Y T,Zhang B, Leng P, Yang Y, Rao W 2009 Semiconductor Science and Technology 24 035003.
  • 7Xi X W, Chai C C, Ren X R, Yang Y T, Zhang B 2009 Proceedings of the 16th IEEE International Symposium on the Physical and Failure Analysis of integrated Circuits, Suzhou, China,July 6--10,2009 p443.
  • 8Manck O,Engl W L 1975 IEEE Transaction on Electron Device 22 339.
  • 9余稳,蔡新华,黄文华,刘国治.电磁脉冲对半导体器件的电流模式破坏[J].强激光与粒子束,1999,11(3):355-358. 被引量:23
  • 10李平 方进勇 刘国治 黄文华.试验与研究,2000,23:70-70.

二级参考文献26

  • 1Dobykin V D, Kharchenko V V. Electromagnetic-pulse functional damage of semiconductor devices modeled using temperature gradients as boundary conditions. Journal of Communications Technology and Electronics(Russia),2006,51(2):231
  • 2Zhuang Yiqi,Sun Qing. Correlation between 1/f noise and hFE long term instability in silicon device. IEEE Trans Electron Devices,1991,ED-38(11) :2540
  • 3Tolpadi A,Srivastava R S. Generation of interface states and oxide charges in n-MOS structures due to high electric field. Solid State Electron, 1987,30(10) :919
  • 4Dimitrijev S,Stojadinovic N. Analysis of CMOS transistors instability. Solid-State Electron, 1987,30 (10) :991
  • 5刘兴斌.MOSFET参数不稳定性与低频噪声的关系.西安电子科技大学硕士论文,1989.
  • 6Zhuang Yiqi, Sun Qing. 1/f noise as a reliability prediction for subsurface Zener diodes. The Proceedings of the 3rd International Conference on Solid-State and IC Technology,Beijing, 1992
  • 7Fleetwood D M,Scafield J H. Evidence that similar point defects cause 1/f noise and radiation-induced-hole trapping in metal-oxide-semiconductor transistors. Phys Rev Lett, 1990,64 (5): 579
  • 8Masetti G,Graffi S,Golzio D,et al. Failures induced on analog integrated circuits by conveyed electromagnetic interferences: a review. Microelectronics Reliability, 1996,36 (7/8) : 955
  • 9Kim Kyechong, Iliadis A A, Granatstein V L. Effects of microwave interference on the operational parameters of n-channel enhancement mode MOSFET devices in CMOS integrated circuits. Solid-State Electronics,2004,48(10/11) :1795
  • 10Wang H X, Rodriguez S, Dirik C, et al. Electromagnetic interference and digital circuits: an initial study of clock networks. Electromagnetics, 2006,26 (1) : 73

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