一种新型PID控制的全数字锁相环的设计与实现

The design and implementation of a novel all digital phase-locked loop with PID control

一种采用积分分离的PID控制作为环路滤波器的全数字锁相环。该滤波器对序列滤波器输出的加减脉冲个数在反馈信号的上升沿进行综合,然后通过PID控制算法将综合值作为压控振荡器的分频值来实现相位的调整,最终达到相位锁定。PID控制算法响应时间短并可控制超调量,相比PI算法具有更快的上升时间,且不增加超调量。另外,该环路具有结构简单、易于集成等特点,可以作为一个子系统或功能块构成片上系统(SoC),用以提高控制系统的可靠性,简化系统硬件结构。

We propose an ADPLL with integral separated PID control as a separate loop filter, the loop fiher composite addition and subtraction pulse numbers in the rising edge of the feedback signal, and make the result as the VCO＇s frequency value through the comprehensive PID algorithm, to realize the phase adjustment, and achieve finally phase lock. The PID control algo- rithm with short response time, compared with the PI algorithm, can control overshoot, has faster response and doesn＇t add overshoot. In addition, the circuit has simple structure, easy to integrated, etc. which can be used as a subsystem or function blocks to constitute the chip system（Soc）, in order to improve the reliability of the control system, simplified system hardware structure.