嵌入式逻辑分析仪在SOPC系统调试中的应用

Application of Embedded Logic Analyzer in Debugging of SOPC System

随着逻辑设计复杂性的不断提高,仅依赖于软件方式的仿真测试了解设计系统的硬件功能已远远不够。本文介绍了可编程逻辑器件开发工具Quartus II中SignalTap II嵌入式逻辑分析仪的特点和使用过程,并给出一个具体的SOPC设计实例,详细介绍使用SignalTap II对Nios系统调试的具体方法和步骤S。ignalTap II在SOPC系统调试中能够捕捉和显示实时信号,方便我们在软件运行过程中跟踪FPGA硬件内部的特性,大大减少了调试、验证过程花费的时间,提高了SOPC设计的灵活性。

With the continuous improvement of logical design complexity, to know hardware function of design system, it has been far from enough to only rely on simulation test in software way. The paper introduces characteristics and operational process of SignalTap Ⅱ of programmable logic device development tools Quartus Ⅱ, and gives a concrete SOPC example, which elaborates how to use SignalTap Ⅱin the specific method and system debug procedures. SignalTap II can capture and display real-time signals in SOPC system debugging process.Thus we can trace conveniently internal hardware characteristics of FPGA in our software running process, which greatly reduce the cost of debug and verification , and improve the flexibility of the SOPC design.