摘要
设计了一种基于FPGA的雷达中/视频数据采集与回放系统。系统以FPGA为数据采集和传输控制的芯片,通过USB 2.0接口实现与计算机的通信,并运用虚拟技术,采用Visual C++语言设计系统的计算机实时显示界面。设计中运用硬件描述语言对FPGA进行编程,在完成对输入信号的采集和记录的同时,实现了对输入信号的防抖动、过零检测、等精度测频及电压最值、峰峰值和平均值的测量。该系统被封装于一个小型的屏蔽盒内,非常便于携带,可方便应用于外场雷达的数据采集。
A system which is used to acquire and replay radar＇s intermediate/video-frequency data, is designed in this pa- per. The system uses FPGA as kernel chip to control the data acquisition and transmission, and uses USB2.0 to communicate with a microcomputer. With the help of virtual technology, it adopts Visual C-- language to design a real-time display inter- face on microcomputer monitor. In the process of design, the FPGA devices were programmed with VHDL language. Along with the input signal＇s acquisition and recording, the system also realized the {unction of anti-dithering, zero-detection, frequency measurement, and the peak value, maximum to maximum and average voltage measurement. The system which is put into a small shielding box, is very portable, and it is very convenient to acquire the data of outside radar.
出处
《现代电子技术》
2010年第22期168-171,共4页
Modern Electronics Technique
