减小共模电压的通用多电平SVPWM算法及FPGA实现

Generalized multilevel voltage SVPWM algorithm for common mode voltage reduction and FPGA implementation

针对电平数增加造成开关矢量数目增多,导致多电平空间矢量脉宽调制算法实现复杂的问题,提出一种通用的多电平空间矢量脉宽调制快速计算方法。该方法基于参考电压分解,利用相电压合成电压矢量,能快速确定合成电压矢量及计算各矢量的作用时间,具有清晰的物理概念。讨论了为减小输出共模电压的7段/5段式空间矢量脉宽调制开关序列的生成方法及FPGA实现的简化方法。所提出的调制算法具有通用性,适用于任意电平且复杂程度与电平数无关,输出共模电压小,始终限制在单位电平的2/3以下,相电压波形正弦对称,谐波含量少。算法计算量小,无需查找表,FPGA实现容易,占用资源少。

The vector number increases with the more voltage levels,and which complicates the implementation of multilevel voltage space vector pulse width modulation（SVPWM） algorithm.This paper proposed a phase voltage projection based fast general multilevel SVPWM method.This paper illustrated the base switch vectors selection,dwelling time calculation,the switch sequence determination for 7 sects/5 sects SVPWM to reduce common mode voltage（CMV） and FPGA realization.This method suits generalized multilevel converters and the complication has no relationship with the voltage level number.The output common mode voltage could be always limited under 2/3 voltage level,and the phase voltages waveforms are symmetrical sinusoids with few harmonics.This method,does not need lookup table with less memory cost and calculation,and thus could be implemented in FPGA easily.