基于FPGA的ARM与CAN控制器的接口设计与实现

Design and Realization of the Interface between ARM and CAN Controller Based on FPGA

卫星姿轨控系统CAN总线的设计与实现是基于CAN总线的卫星控制系统实现的关键技术之一;本文分析了ARM处理器AT91RM9200和CAN控制器SJA1000的接口信号及时序,设计了基于现场可编程门阵列FPGA的ARM处理器与CAN控制器之间的接口电路,并给出了详细的软硬件实现方法,最后,在卫星姿轨控下位机原理样机中实现了该接口方案;测试结果表明,该接口能够实现CAN总线在不同波特率下的通信,性能可靠,扩展性强,满足了姿轨控计算机两路CAN总线冗余备份的要求,为其它系列处理器外扩地址数据线复用接口提供了参考。

Design and realization of the CAN bus in the attitude and orbit control system of a satellite is one of the key technologies in the CAN-bus-based control system of the satellite.In this paper,the interface signals and the time sequences about the ARM processor of AT91RM9200 and the CAN controller of SJA1000 are analyzed;the interface circuit between ARM processor and CAN controller based on field programmable gate array（FPGA） is designed,and the detailed realization methods of software and hardware are given.In the end,this design is used in the satellite prototype hardware platform of the attitude and orbit control system.Experimental results show that the interface works stably in different baud rate of the CAN bus.It is reliable and expandable in the aspect of meeting the attitude and orbit control computer requirements of two-way CAN bus for redundancy and will provide a reference in dealing with a similar problem.