一种基于FPGA的海杂波产生器设计

Design of One Sea Clutter Generator Based on FPGA

海杂波是反舰导弹末制导雷达回波的主要背景噪声，在末制导雷达模拟器的设计中，海杂波产生器是一个重要组成部分。在研究海杂波噪声概率分布密度的基础上，给出了一种基于FPGA技术的海杂波产生器的设计方案，并利用Ahera公司的cyclone Ⅱ系列芯片和Quartus Ⅱ开发软件对设计进行了仿真验证。采用FPGA技术可以方便地对设计方案、海杂波的分布形式、数据量大小进行修改。仿真结果表明，该设计能够产生符合要求的海杂波信号，并且具有结构简单、集成度高、易于修改等特点。

Sea clutter is the main background noise of terminal guidance radar echo of anti-ship missiles. In the terminal guidance radar simulator design, the sea clutter generator is an important component. In this paper, sea clutter was studied based on the probability distribution density, and then a design program of sea clutter generator was given based on FPGA. The design were simulated and tested by Altera＇s cyclone II series chip and Quartus II software. Using FPGA technology can easily modify the design program, the form of sea clutter distribution, as well as the amount of data size. Simulation results show that the design can produce the required sea clutter signal, and it has a simple structure, high integration, easy modification and so on.