1BRACERAS G, FREDERICK T, HALL S, et al. A 200 MHz internal 66 MHz external 64 kB embedded virtual three-port cache SRAM [C]// Sol Sta Circ Conf. San Francisco, CA, USA. 1994: 262-263.
2DJEMOUAI A, SAWAN M, SLAMANIL M. New CMOS integrated pulse width modulator for voltage conversion applications [ C] // 7^th IEEE Int Conf ICECS. Jounieh, Lebanon. 2000, 1:116-119.
3YANG J-L, CHAO C-W, LIN S-M. Tunable delay element for low power VLSI circuit design [C] //TENCON. Hong Kong, China. 2006: 1-4.
4TAKAYASU S. Optimization of CMOS arbiter and synchronizer circuits with submicrometer MOSFETs [J]. IEEEJ Sol Sta Circ, 1988, 23: 901-906.
