高帧频数字摄像机显示系统设计

Design of Display System for High Frame Rate Digital Camera

以Camera Link接口的高帧频数字摄像机具有输出帧频高、数据量大的特点,常规的监视器无法直接显示,限制了其在实时监测方面的应用,因此,高帧频数字摄像机的实时全分辨率显示具有重要意义。本文分析了高帧频摄像机数字口输出工作时序,针对其数据量大的特点,提出利用FPGA外部扩展SDRAM的方式存储缓冲图像数据的解决方案。该方案可灵活抽取SDRAM存储的部分数据帧来显示,实现高速图像数据流的帧频变换和时钟域变换,在相应的显示时序控制下,通过DAC转换成VGA视频格式以满足显示设备的需要,实现视频图像的稳定显示。

The digital high frame rate camera with camera link format output interface,have high frame rate and magnitude of data stream features,which limit it＇s application to monitor in real-time.The real-time and full scale display for high frame rate digital camera have important significance.The camera operation timing is analyzed in this paper.For the feature of large amount of image data,a solution that FPGA extended SDRAM to store and buffer image data is presented.Data of SDRAM can be accessed flexibly and extracted a part of data frames to display,so as to realize frame rate and clock domain transform.Image data with corresponding control timing,via DAC convert to VGA Format video can meet the requirements of the monitor with VGA interface,and display steady.