一种高线性度低失真模拟乘法器的设计

Design of a High-Linearity and Low Distortion Analog Multiplier

基于吉尔伯特单元,设计了一款高线性度低失真模拟乘法器。通过在输入端加入一个电平移位器,使线性输入范围增大,并由一个跨导运算放大器给吉尔伯特单元提供尾电流,有效地改善了乘法器的线性特性。设计的电路基于UMC 0.6μm BCD工艺,采用HSPICE进行仿真验证。结果表明,该乘法器的线性输入范围可达±2 V,非线性误差和总谐波失真分别小于1%和0.3%,适用于要求输入范围大、非线性误差小及失真低的系统。

A high-linearity analog multiplier based on Gilbert cell was presented.The linear input range of the circuit was extended by adding a level shifter to input.An OTA was adopted to supply tail current for Gilbert cell,which effectively improved the linearity of the multiplier.The circuit was simulated with HSPICE based on UMC＇s 0.6 μm BCD technology.Simulation results showed that the multiplier had a linear input range of ±2 V,a linearity error and a total harmonic distortion（THD） smaller than 1% and 0.3%,respectively.The proposed multiplier is applicable for systems requiring large linear input range,small linearity error and low THD.