摘要
分析了传统PWM调制和Sigma-Delta调制在噪声性能方面的差异,以及它们对DC-DC变换器输出噪声的影响。在Chartered 0.35μm CMOS工艺条件下实现了一个基于二阶Sigma-Delta调制的低噪声DC-DC变换器,并对其中Sigma-Delta调制模块进行了流片验证。测试结果表明,Sigma-Delta调制模块能够将环路带宽内噪声抑制到-50 dB左右,并且未引入与开关频率有关的谐波成分。仿真结果表明,DC-DC变换器输出电压噪底能够达到-60 dB以下。
This paper analyzes the noise characteristics of PWM modulation and sigma-delta modulation and their different effects to the noise performance of DC-DC converter.A second-order continuous-time sigma-delta modulator is designed and fabricated on Chartered 0.35 μm CMOS process.Upon this,a low-noise DC-DC converter with sigma-delta modulation is implemented.Experimental results show that in-band noise can be suppressed to about-50 dB by sigma-delta modulator without introducing any clock-referenced harmonic contents.Simulation results show that noise floor of the output voltage of DC-DC converter can be below-60 dB.
出处
《固体电子学研究与进展》
CAS
CSCD
北大核心
2010年第4期574-579,共6页
Research & Progress of SSE
基金
国家自然科学基金项目(60676013)
