门电路延迟时间的Multisim仿真测试方案

Multisim Simulation Testing Plan of Gate Circuit′s Delay Time

介绍了用Multisim仿真软件测试门电路延迟时间的方法,提出了三种测试方案,即将奇数个门首尾相接构成环形振荡电路,用虚拟示波器测试所产生振荡信号的周期,计算门的传输延迟时间;奇数个门首尾相接构成环形振荡电路,用虚拟示波器测试其中一个门的输入信号、输出信号波形及延迟时间;在一个门的输入端加入矩形脉冲信号,测试一个门的输入信号、输出信号波形及延迟时间。所述方法的创新点是,解决了受示波器上限频率限制实际硬件测试效果不明显的问题,并给出Multisim软件将门的初始输出状态设置为0时,使测试电路不能正常工作的解决方法。

A method to test the delay time of gate circuit by Multism simulation software is introduced. Three kinds of testing proiects are proposed： the odd gate circuit is connected from head to end to form the ring vibrator circuit, and then calculate the transmission delay time of gate with the oscillator signal period produced by the virtual oscillograph; the odd gate circuit is connected from head to end to form ring vibrator circuit, and then test the waveform delay time of the input and out- put signals on one of the gates by the virtual oscillograph; the rectangle pulsing signal is added at the input port of a gate to test the waveform and delay time of input ; output signal on a gate. The method solved the problem that the test effect is unconspicuous because oscillographeh upper frequency limit, and also solved the problem that testing circuit can not work normally as Multisim simulation software initial state is set up zero.