摘要
基于并行前缀算法的Kogge-Stone结构,通过改进其结构层次上的逻辑电路,提出一种改进的并行前缀加法器.与传统电路相比,该加法器不仅可以减小面积、功耗和延时,而且随着位宽的加大其优势更加明显,是适用于宽位的并行前缀加法器.
Based on Kogge-Stone architecture of parallel prefix algorithm,an advanced parallel prefix adder by improving the logic circuit of its architecture levels is proposed.Compared with the traditional one,this adder not only can save the area,power dissipation and delay,but also have more preponderant with the operand bits increase,is suitable for parallel prefix adder of multi-bit operands.
出处
《微电子学与计算机》
CSCD
北大核心
2011年第2期47-50,共4页
Microelectronics & Computer
