一种基于电压控制的扫描测试功耗优化方法

A Method for Scan Test Power Optimization Based on Voltage Control

提出了一种通过电压控制来实现扫描测试低功耗优化的方法(压控法).该方法主要采用插入门控晶体管来控制组合逻辑单元供电,从而有效地解决了在扫描测试移入过程中测试信号向组合逻辑的无用传播,由于组合逻辑的供电受到控制,因此压控法不仅有效降低了无用的动态功耗,同时也大大降低了由于供电所产生的漏电静态功耗.而且门控晶体管的插入对于当前设计的面积和时序影响都很小.实验结果表明,压控法对面积和延迟的影响远远小于以往插入逻辑门单元的方法,同时对功耗的优化最高可达近32%的改善.

This paper proposed a method to accomplish scan test low-power optimization through voltage control. This method is named voltage-control method for short. It controls the power supply of combination logical units mainly through gating transistor insertion. It effectively solves the problem of the useless propagation to combination logic from test signals in the process of the shift- in of scan test. The power supply of combination logic is controlled, thus the voltage-eontrol method not only effectively reduces useless dynamic power, but also substantially reduces the leakage current static power caused by power supply. Also the insertion of gating transistor has little influence on the designed area and timing sequence. The experiment result has shown that the voltage-control method has much less influence on the area and delay than the logic gate insertion method, and also, the power optimization is improved by nearly 32%.