期刊文献+

多级锐化的梳状抽取滤波器

Multistage sharpened comb decimation filter
下载PDF
导出
摘要 针对传统的递归型级联积分-梳状抽取滤波器(CICDF)频响特性不理想、功耗较大、最大电路速率受限等问题,提出了一种多级锐化的梳状抽取滤波器(MSCDF)。该滤波器利用降序素数分解和部分多相分解相结合的方法将CICDF转化为多级多相结构以降低功耗和放宽对电路速率的限制,并从第二级开始逐级进行锐化处理从而使抽取器的频响得到改善。仿真结果表明,在抽取因子为非素数的情况下,MSCDF不仅能够有效地改善CICDF的通带衰减和混叠抑制性能,而且与频响相近的完全锐化抽取器(FSCDF)相比,功耗更小,最大电路速率更高。 In consideration of the problems in traditional recursive cascaded integrator-comb decimation filters (CICDF), such as unacceptable frequency response, high power consumption and restricted circuit speed, the paper proposes a novel multistage sharpened comb decimation filter (MSCDF). To lower the power consumption and loosen the limitation of cir- cuit speed, the MSCDF converts the CICDF into a multistage polyphase structure using descending prime factorization and partial polyphase decomposition, and starts the sharpening process from the second stage for improvement of the frequency response. The simulation results indicate that, when the decimation ratio is not prime, the MSCDF can effectively improve the passband droop and aliasing rejection of the CICDF, and compared with the full-sharpened comb decimation filter (FSCDF) which has the similar frequency response, it can lower the power consumption and higher maximum circuit speed.
出处 《高技术通讯》 EI CAS CSCD 北大核心 2010年第12期1286-1291,共6页 Chinese High Technology Letters
基金 中国博士后科学基金(20080431379)资助项目
关键词 抽取 梳状滤波器 素数分解 多相分解 锐化 decimation, comb filter, prime factorization, polyphase decomposition, sharpening
  • 相关文献

参考文献18

  • 1Hogenauer E B.An economical class of digital filters for decimation and interpolation.IEEE Transaction on Acoust,Speech,Signal Processing,1981,ASSP-29(2):155-162.
  • 2Laddomada M.Design of Multistage Decimation Filters Using Cyclotomic Polynomials:Optimization and Design Issues.IEEE Transaction on Circuits and Systems I:Regular Papers,2008,55(7):1977-1987.
  • 3Laddomada M.On the Polyphase Decomposition for Design of Generalized Comb Decimation Filters.IEEE Transaction on Circuits and Systems I:Regular Papers,2008,55(8):2287-2299.
  • 4Aboushady H,Dumonteix Y,Louerat M M,et al.Efficient polyphase decomposition of comb decimation filters in Sigma-Delta analog-to-digital converters.IEEE Transaction on Circuits and Systems Ⅱ:Analog and Digital Signal Process,2001,48(10):898-903.
  • 5Dolecek G J,Harris F.Design of CIC compensator filter in a digital IF receiver.In:Proceedings of the International Symposium on Communications and Information Technologies,Vientiane,Lao PDR,2008.638-643.
  • 6Presti L L.Efficient modified-sinc filters for sigma-delta A/D converters.IEEE Transactions on Circuits and Systems II:Analog and Digital Signal Processing,2000,47(11):1204-1213.
  • 7Gao Y,Jia L,Isoaho J,et al.A comparison design of comb decimators for sigma-delta analog-to-digital converters.Analog Integrated Circuits and Signal Processing,2000,22(1):51-60.
  • 8李冰,郑瑾,葛临东.基于多相结构和部分锐化的CIC抽取滤波器[J].电子与信息学报,2007,29(4):1005-1008. 被引量:3
  • 9Gao Y,Jia L,Tenhunen H.A partial-polyphase VLSI architecture for very high speed CIC decimation filters.In:Proceedings of the 12th Annual IEEE International ASIC/SOC Conference,Washington,DC,USA,1999,391-395.
  • 10窦建华,梁红松,胡敏,汪荣贵.一种改进的CIC抽取滤波器设计[J].系统工程与电子技术,2008,30(5):984-986. 被引量:7

二级参考文献37

  • 1De Aquino F J A, Da Rocha C A F, Resende L S. Design of CIC filters for software radio system[J]. IEEE Interbational Conference on Acoustics, Speech and Signal Processing, 2006, 3 :14-19
  • 2Lian Y, Lim Y C. New prefilter structure for designing FIR filters[J]. Electronics Letters, 29:1034 - 1036.
  • 3Dolecek G J, Mitra S K. Stepped triangular CIC-Cosine decimation Filter[J]. Signal Processing Symposium, 2006 : 26 - 29.
  • 4Dolecek G J, Carmona J D. A new cascaded modified CIC-cosine decimation filter[J]. IEEE lnternational Symposium on Circuits and Systems, 2005:3733 - 3736.
  • 5Losada R A, Lyons R. Reducing CIC filter complexity[J]. IEEE Signal Processing Magazine, 2006, 23 : 124 - 126.
  • 6Stephen G and Stewart R W.High-speed sharpening of decimating CIC filter[J].IEE Electronics Letters,2004,40(21):1383-1384.
  • 7Yong Hong Gao,Li Hong Jia,and Hannu Tenhunen.A partial polyphase VLSI architecture for very high speed CIC decimation filters[C].Proc.12th Annual IEEE Int.ASIC/SOC Conf.,Washington,1999:391-395.
  • 8Young Beom Jang and Se Jung Yang.Non-recursive cascaded integrator-comb decimation filters with multiple factors[C].Proc.44th IEEE Midwest Sympo.on Circuits and Systems,Dayton,OH,2001:130-133.
  • 9Stephen G and Stewart R W.Sharpening of partially non-recursive CIC decimation filters[C].Proc.38th Annual Asilomar Conference on Signals,Systems and Computers,Pacific Grove,California,2004,vol.2:2170-2173.
  • 10Vaidyanathan P P.Multirate digital filters,filter banks,polyphase networks,and applications:A tutorial[J].Proc.IEEE,1990,78(1):56-93.

共引文献12

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部